qid2 (intel celeron 1400 mhz) Detail Information
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| General information | |
| Type | |
| Family | |
| Part number | |
| Frequency (MHz) | 1400 |
| Bus speed (MHz) | 100 |
| Clock multiplier | 14 |
| Package type | 370-pin FC-PGA2 |
| Socket type | |
| Architecture / Microarchitecture / Other | |
| CPUID | 06B4h |
| Core stepping | tB1 |
| Processor core | Tualatin-256 |
| L2 cache size (KB) | 256 |
| Notes on sSpec QID2 | |
| |
CPU ID (1)
| Intel Celeron 1400 MHz QID2 | |||||||||
|---|---|---|---|---|---|---|---|---|---|
|
| ||||||||
| General information | |
|---|---|
| Vendor: | GenuineIntel |
| Processor name (BIOS): | Intel(R) Celeron(TM) CPU 1400MHz |
| Processor type: | Original OEM Processor |
| CPUID signature: | 6B1 |
| Family: | 6 (06h) |
| Model: | 11 (0Bh) |
| Stepping: | 1 (01h) |
| TLB/Cache details: | Data TLB: 4-KB Pages, 4-way set associative, 64 entries Data TLB: 4-MB Pages, 4-way set associative, 8 entries Instruction TLB: 4-KB Pages, 4-way set associative, 32 entries Instruction TLB: 4-MB Pages, fully associative, 2 entries |
| Cache: | L1 data | L1 instruction | L2 |
|---|---|---|---|
| Size: | 16 KB | 16 KB | 256 KB |
| Associativity: | 4-way set associative |
4-way set associative |
8-way set associative |
| Line size: | 32 bytes | 32 bytes | 32 bytes |
| Instruction set extensions | Additional instructions | ||
|---|---|---|---|
| MMX | CMOV | ||
| SSE | CMPXCHG8B | ||
| FXSAVE/FXRSTORE | |||
| SYSENTER/SYSEXIT | |||
| Major features | Other features | ||
| On-chip Floating Point Unit | 36-bit page-size extensions | ||
| Debugging extensions | |||
| Machine check architecture | |||
| Machine check exception | |||
| Memory-type range registers | |||
| Model-specific registers | |||
| Page attribute table | |||
| Page global extension | |||
| Page-size extensions (4MB pages) | |||
| Physical address extensions | |||
| Time stamp counter | |||
| Virtual 8086-mode enhancements | |||